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Establish an average model for the primary-side regulated flyback converter
AC analysis is a fundamental aspect of the traditional flyback topology, involving an optocoupler combined with a shunt regulator like the popular TL431. As smartphones and tablets have become ubiquitous, the demand in the adapter market—especially the portable adapter segment—is to minimize the size and cost of this "black box" component attached to the power supply. How can manufacturers achieve these goals?
One solution is to simplify the feedback loop and adopt a primary-side adjustment structure. While adjusting via the primary winding is a known concept, recent advancements have improved accuracy and enabled control over output current without needing direct measurement. These primary-side regulation (PSR) controllers are now widely used in various applications, competing with traditional optocoupler-based designs. However, compensation strategies for PSR topologies are not extensively documented. To stabilize the power supply, an AC analysis is necessary, often utilizing an average model.
This article explores the key differences between a conventional flyback converter with an optocoupler and a PSR flyback. We’ll delve into constructing an average model for a PSR flyback, including the essential sample-and-hold circuit, and simplifying it without compromising the transfer function. We’ll assess the transfer function, compare the Mathcad-generated graph with the converter simulation, and plot the loop compensation. Finally, we’ll calculate the adjustments needed to meet the desired phase margin.
**Comparison of Classic Flyback vs. PSR**
The term "classic flyback" refers to a feedback mechanism involving a secondary shunt regulator like the TL431 and an optocoupler to relay information to the primary side. A typical schematic of this converter is illustrated in Figure 1.
[Insert Figure 1: Simplified schematic of a classic flyback structure]
In this configuration, the output voltage is directly sensed at the secondary side. The optocoupler LED's current is modulated to transmit regulation data to the primary-side controller, which adjusts either the switching frequency or the peak primary current to maintain the output voltage at the rated value.
However, optocouplers are relatively costly and occupy more PCB space (e.g., 0603 packages) compared to simpler SMD components like resistors or capacitors. Given the millions of travel adapters shipped annually with smartphones, removing the secondary-side circuitry and optocouplers would significantly reduce costs for manufacturers. Consequently, new solutions emerged to eliminate these components, as depicted in Figure 2, while preserving the accuracy of regulation comparable to the traditional flyback design.
[Insert Figure 2: Simplified schematic of a PSR-based flyback structure]
**Working Principle of PSR**
From the schematic in Figure 2, the sole connection between the primary (high-voltage) and isolated secondary (low DC voltage) remains the transformer. Removing the optocoupler enhances safety and reliability since aging of the optocoupler leads to performance degradation (e.g., reduced current transfer ratio CTR) and susceptibility to external interference.
How does the primary-side regulation work? Let’s examine the signals around the transformer, as shown in Figure 3.
[Insert Figure 3: SPICE waveform measured on or near the flyback transformer]
During the shutdown phase, the drain voltage (VDS) equals the sum of the input voltage and output voltage, influenced by the primary-to-secondary turns ratio NPS (Nsecondary/Nprimary).
Next, we focus on the secondary winding voltage (VSEC). During the off-period (when the primary MOSFET is off), the voltage equals the sum of the output voltage and the voltage determined by the output rectifier and capacitor. During this time, the output rectifier diode turns on, supplying power to the load and charging the output capacitor. If we amplify the secondary winding voltage, as shown in Figure 4, we observe that the voltage decreases with diode current. This slope stems from the diode's dynamic resistance rd.
[Insert Figure 4: Effect of diode dynamic resistance on secondary winding voltage (simulation curve)]
In reality, the voltage drop across the diode comprises two factors:
1. Turn-on threshold: VT0
2. Voltage drop across dynamic resistance: rd
VT0 is a technology-specific parameter, while rd depends on the diode's operating point. The voltage on the auxiliary winding follows a similar pattern as the secondary winding voltage but is affected by the auxiliary turns ratio. With Figure 4, it becomes evident that if the primary-side controller samples the voltage at the beginning of the demagnetization period (the first vertical dashed line in Figure 4), the output voltage information is influenced by the current. At full load, the output voltage will be lower than under light-load conditions due to the presence of dynamic resistance.
To accurately send information to the controller, our PSR circuit detects the end of core demagnetization—the auxiliary voltage inflection point—before sampling the voltage. This technique naturally produces an accurate output voltage expression. Practically, this is implemented within the controller die, incorporating a sample-and-hold circuit connected to the Vs/ZCD pin (zero-crossing detection), and the CV-regulated pin. The sampled signal is compared against a reference voltage and regulated to a constant voltage by the operational transconductance amplifier (OTA) shown in Figure 5.
[Insert Figure 5: Simplified schematic of constant voltage regulation]
The waveform in Figure 6 illustrates the refresh voltage for CV adjustment. The signal linked to the red curve (OTA) is periodically refreshed without being impacted by the output current. Thanks to this method, constant voltage regulation remains precise across varying output loads or input voltages. Load regulation performance, as shown in Figure 7, achieves an impressive 0.5% accuracy across the output power range—a feat not possible with conventional, simple auxiliary-based converters.
[Insert Figure 6: Refresh voltage for CV adjustment]
[Insert Figure 7: Load regulation performance of the PSR controller]
**Power-Level Average Model Using Primary-Side Regulation Topology**
One approach to study converter stability is employing an averaging model. To create this model, we utilize the pulse width modulation (PWM) switching model introduced in the 1990s, referenced in [1], and applied to quasi-resonant (QR) operation. The PWM switch model simplifies the diode and main MOSFET into a three-pin model that linearizes discontinuities during switching, enabling straightforward frequency response analysis. Since this method is well-documented (see [1] and [2]), we won't dwell further on it here.
Using the PWM switch model for the QR flyback topology, the schematic in Figure 8 can be constructed.
[Insert Figure 8: PWM switch model in a flyback converter]
This schematic integrates all devices surrounding the transformer without simplifications. Connected to the secondary winding, we identify the output capacitor (Cout) and its equivalent series resistance (Resr1), along with the output load (Rload). On the auxiliary winding, the Vcc capacitor (CVcc) connects in series with ESR (Resr2). Additionally, the IC is modeled with resistor RIC, and a resistor links the auxiliary winding to the ZCD pin. Simulating this schematic in SPICE allows extraction of the control output Bode plot of the power stage (Ctrl node to Vout). Figure 9 presents the results. Note that while the specific values of devices in Figure 8 aren’t detailed, they represent realistic applications.
[Insert Figure 9: Power stage transfer function]
At a crossover frequency fc of 1 kHz, we strike a balance between rapid transient response and robust noise immunity. The right half-plane zero (RHPZ) in the DCM current-mode flyback converter remains distant and does not interfere. At this cutoff frequency, the power stage attenuation measures 19.5 dB, and the phase is -88.9 degrees.
Since the feedback signal originates from the auxiliary winding, we need to generate a Bode plot identical to the output observed at the Vaux node (Figure 10). The phase shape remains unchanged, but the amplitude curve is affected by the transformer turns ratio:
\[ V_{\text{aux}} = \frac{N_{\text{PA}}}{N_{\text{PS}}} \cdot V_{\text{out}} \tag{1} \]
[Insert Figure 10: Transfer function on the auxiliary winding]
With this average model setup, all output devices automatically reflect onto the auxiliary winding. Both diodes are assumed to have negligible dynamic resistance and are treated as short circuits.
**Simplification of the Power-Level Average Model**
The next step involves simplifying the schematic to reduce the number of components without altering the transfer function. In Figure 8, we see three windings: the primary winding, the secondary winding involved in power transfer, and the auxiliary winding used for measuring output voltage and powering the controller. Our ultimate goal is to draw the open-loop transfer function, so we aim to simplify the transformer as much as possible with a single secondary winding. All Bode plots won’t be displayed in this article. The first step is to remove the IC’s resistance, followed by the Vcc capacitor. The final simplification involves reflecting the devices connecting the secondary side to the auxiliary winding.
Let’s focus on the transformer shown in Figure 11. Compared to Figure 8, the number of components connected to the auxiliary winding is now limited to the ZCD pin bridge resistance. The turns ratios connecting the primary to the secondary and auxiliary windings are recorded as NPS and NPA, respectively.
[Insert Figure 11: Transformer and secondary components. Simplifying this schematic enables us to streamline the power-level averaging model.]
For clarity and ease of understanding, we’ll divide this into two steps. First, the output capacitor and resistive load are reflected onto the primary side, as shown in Figure 12. These elements will then be reflected from the primary to the auxiliary winding.
[Insert Figure 12: Output capacitance and load reflected to the primary side.]
**Reflection Around the Transformer**
If we treat circuit devices as ideal, how do they reflect onto the transformer, particularly when the diode has zero dynamic resistance? Let’s examine the equation of the ideal transformer drawn in Figure 13.
[Insert Figure 13: Ideal transformer.]
[Insert Figure 14: Practical application]
The NCP1365-based PSR converter has been assembled as shown in Figure 26. The pre-calculated component values were used to compensate the design and soldered onto the board. The 5V output is suitable for loads ranging from 1A to 2A. As demonstrated in Figure 27, the transient response remains excellent regardless of input voltage.
[Insert Figure 26: PSR converter assembly]
[Insert Figure 27: Transient response under low and high voltage conditions]
**Summary**
This article addresses two primary topics: the operation mode of the flyback converter under primary-side regulation and the use of the power-level average model to analyze its behavior. Progress was made in the modeling process by initially simulating a simple QR power stage, to which an auxiliary winding was added. Ultimately, a sample-and-hold circuit was incorporated.
With modern primary-side regulation controllers, the distinction between the classic flyback topology and PSR lies in the implementation of regulation. With a well-designed transformer, the regulation and stability closely resemble those of optocoupler-based power supplies.
In the second part of this article, we demonstrate the calculation of the transfer function for a primary-side regulation converter integrating a sample-and-hold circuit in the controller IC. Using Mathcad software, we constructed a Bode plot from the transfer function and compared it to the simulation model discussed earlier. The two waveforms aligned closely.
Finally, the required compensation circuitry was defined and specified according to the phase margin requirements. Based on this article, designers can construct a Type-2 compensation circuit for a PSR converter. The same approach applies to other topologies, such as power factor correction.
In fact, some PSR controllers come with built-in compensation, eliminating the need for designers to make this decision. However, with ON Semiconductor’s PSR controllers (and others in the future), the ability to design external compensation circuits through modeling removes the trial-and-error process designers previously relied upon.